Design decisions
Summaries only. Full reasoning, rejected options and later corrections are in the decision register.
Running
Emulator
A ternary machine in software, as QEMU is for binary machines.
| Property | Value |
|---|---|
| Word | 27 trits (≈42.8 bits), host i64 |
| Double word | 54 trits, host i128 |
| Addressable unit | 9 trits, a tryte |
| Instruction | 27 trits, fixed width |
| Immediate | 12 trits, ±265,720 |
| Registers | 27, numbered r−13 to r13 |
| Address space | signed, ±3.81×1012 trytes |
| Unwritten memory | faults; it is not zero |
addi r1, r0, 10
addi r2, r0, 0
loop:
addi r2, r2, 1
addi r1, r1, -1
br3 r1, loop
halt
br3 branches three ways from one immediate, using the
sign of the register to choose direction.
Designed
Ternex
A language for a machine whose boolean type has three values.
| Value | Logic | Operation |
|---|---|---|
| −1 | false | NOT x is −x |
| 0 | unknown | x AND y is min(x, y) |
| +1 | true | x OR y is max(x, y) |
Kleene's strong three-valued logic.
if x < y { … }
else { … }
unknown { … }
The unknown arm is optional; omitting it traps if the
condition is unknown.
unknownis SQL'sNULL, not an optional type:unknown == unknownis unknown, whereNone == Noneis true.- Kleene semantics inherit SQL's usability problems, such as
WHERE x != 5excluding NULL rows.
Planned
Numerics
Linear algebra on balanced ternary, and benchmarks to test whether it helps.
- Truncation gives the correctly rounded result, and exact ties cannot occur.
- The product of two 27-trit values is exactly 54 trits, so a double-word accumulator is error-free.
| Claim | Assessment |
|---|---|
| Reproducible across implementations, having no rounding modes | Testable |
| Roughly two extra significand bits at matched storage | Testable |
| Simpler hardware, no guard or sticky digits | Not measurable in an emulator |
| Wobble worse than binary, 3× against 2× | A disadvantage |
| Better accuracy per significand digit | Not claimed |
Formats with equal significand digits and correct rounding share the same error bound; exact rounding alone does not improve accuracy.
Planned
Machine learning
Quantised networks on hardware whose native digit is the weight.
- Quantised networks commonly use weights drawn from −1, 0, +1, currently emulated on binary hardware.
- Missing data is carried by the third trit value, replacing NaN sentinels and parallel mask arrays.
- The second claim is the falsifiable one: it predicts a specific memory and correctness difference.
Planned
Operating system
A command-line operating system running on tryte code.
- Blocked on emulator work: memory management unit, traps and interrupts, and a device model for console, timer and block storage.
- Privilege levels are user, supervisor and machine; RISC-V spends two bits, whereas one trit holds three states.
Sketch
Hardware
Proposals, not decisions, written down so they can be argued with.
Memory map
| Range | Contents |
|---|---|
| Negative | Memory-mapped devices |
| Zero | Reset vector |
| Positive | ROM, then RAM |
Address 0 is the only distinguished address in a signed range. x86 resets at 0xFFFFFFF0, ARM at 0, both by convention.
Registers
| Register | Role |
|---|---|
r0 | Zero, discards writes (decided) |
r1–r3 | Return address, stack, frame |
r4–r13 | Arguments and caller-saved |
r−1–r−13 | Callee-saved and system |
Undecided
- The bit/trit boundary, needed before any I/O exists.
- Trap vector layout and trap frame contents.
- Page table entry format and permission trits.
- Interrupt controller and timer.