pub struct Csrs {
pub tvec: i64,
pub tcause: i64,
pub tepc: i64,
pub tval: i64,
pub tpriv: Priv,
pub ie: Word,
pub ip: Word,
pub tie: Word,
pub ptbr: i64,
pub scratch: i64,
}Expand description
The control and status registers.
Fields§
§tvec: i64Trap vector base. Zero leaves traps fatal, which is the reset state.
tcause: i64Cause of the last trap.
tepc: i64Program counter saved on the last trap.
tval: i64Value associated with the last trap.
tpriv: PrivPrivilege saved on the last trap.
ie: WordInterrupt enable mask, one trit per source.
ip: WordInterrupt pending mask, one trit per source.
tie: WordInterrupt enable saved when the last trap was taken.
Taking a trap clears ie and stores the old value here; tret
restores it. Without this a level-triggered source re-fires before the
handler’s first instruction and the handler never runs.
ptbr: i64Page table base. Zero disables translation.
scratch: i64Scratch space for the handler.
Implementations§
Source§impl Csrs
impl Csrs
Sourcepub fn read(&self, n: i64, current: Priv) -> Option<i64>
pub fn read(&self, n: i64, current: Priv) -> Option<i64>
Reads a register by number. None if the number is not defined.
Sourcepub fn write(&mut self, n: i64, v: i64) -> Option<bool>
pub fn write(&mut self, n: i64, v: i64) -> Option<bool>
Writes a register by number.
Some(false) for a register that exists but is read-only, None for
one that does not exist. Writing a read-only register is silently
ignored rather than trapping, matching the way r0 discards writes.
Sourcepub fn pending_interrupt(&self) -> Option<Cause>
pub fn pending_interrupt(&self) -> Option<Cause>
The interrupt to take, if any.
A source fires when it is both pending and enabled, which is a per-trit minimum: Kleene AND over the two masks (D-06). The lowest such trit wins, so a lower-numbered source has priority.
Sourcepub fn set_pending(&mut self, source: usize, on: bool)
pub fn set_pending(&mut self, source: usize, on: bool)
Sets or clears one trit of the pending mask.